Demonstration of Speed and Power Enhancements through Application of Non-Zero Clock Skew Scheduling
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منابع مشابه
Demonstration of Speed Enhancements on an Industrial Circuit through Application of Non-zero Clock Skew Scheduling
A demonstration of the application of non-zero clock skew scheduling to enhance the speed characteristics of several functional unit blocks in a high performance processor is presented. It is shown that non-zero clock skew scheduling can improve circuit performance while relaxing the strict timing constraints of the critical data paths within a high speed system. A software tool implementing a ...
متن کاملDemonstration of Power Enhancements on an Industrial Circuit through Delay Management of Non-critical Data Paths
On-chip power dissipation has become a fundamental design issue in high performance integrated circuits. A technique to significantly reduce the power dissipated in the non-critical data paths of an industrial circuit is demonstrated. The application of this technique with non-zero clock skew scheduling to the slower data paths is also described. Simulation results demonstrating the application...
متن کاملDemonstration of Speed and Power Enhancements on an Industrial Circuit Through Application of Clock Skew Scheduling
D. VELENIS∗, K. T. TANG†,‖, I. S. KOURTEV‡, V. ADLER§,‖, F. BAEZ¶, and E. G. FRIEDMAN∗ ∗Department of Electrical and Computer Engineering, University of Rochester, Rochester, New York 14627, USA †Broadcom Corporation, 2099 Gateway Place, San Jose, California 95110, USA ‡Department of Electrical Engineering, University of Pittsburgh, Pittsburgh, Pennsylvania 15261, USA §Sun Microsystems, 901 San...
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Simultaneous switching events in the clock lines and the signals passing through sequential and combinational logic elements cause large and voltage variations in the power and ground network. This is known as power supply noise and it affects the performance and reliability of the entire circuit. In this paper, we propose an algorithm that performs clock skew scheduling to minimize the number ...
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Leakage current minimization is an important topic for event driven applications that spend most of their times in standby mode. Power gating technique is one of the most effective ways to reduce the standby leakage current. However, when power gating technique is applied to a functional unit, there exists a delay-power tradeoff, which can be characterized with the widths of sleep transistors. ...
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